The OPTIMUM 200-LCM burn-in system is a fully monitored test burn-in system for production screening of memory products. The system has been developed for high density memory testing in an integrated burn-in environment. The system provides functional verification of DRAMs, SRAMs, EPROMs, etc. The design goal for this system was to provide a functional tester, with reasonable performance, at a cost that was not prohibitive for integration within either production or QRA environments.
Each electronics position consists of independent voltage regulators, fault cache, comparators, and OPTIMUM control interface. Four standard (8 optional) pattern generators are provided. The pattern generators are algorithmic, providing all standard patterns through N2 and are distributed to multiple test positions.
The system performance is based on an 80 MHz main oscillator. This provides 25 nSec pulse width and edge timing resolution. The minimum cycle time is 375 nSec. Address Rise and Fall times are less than 50 nSec with Tr/Tf on clocks at better than 20 nSec with <5 nSec skew across the test board. Signal levels can vary between 1.5 and 8 volts providing test flexibility for future low voltage devices as well as all existing CMOS technology. A graphical interface has been provided for entry of timing sets improving previous entry methods that did not allow relational data entry.
The system provides 136 signal interface channels consisting of 32 chip selects, 64 Data I/O, 16 Clocks (RAS, WE, OE, etc.), 24 addresses. All input signals are looped back and monitored on the electronics interface to ensure integrity. The signal configuration provides testing of DRAMs to 1G and SRAMs to 64M. Address scrambling is provided on row and column boundaries.
Because this is a functional burn-in tester (i.e. TDBI), pass/fail data is easily collected and displayed for full, functional screening flow in production. OPCTL process control/test language is used to provide flexible application of the system to a wide range of test procedures. Cumulative failures are also collected for QRA applications (i.e. optimal burn-in calculations). As with all OPTIMUM systems, multiple chambers and zones can be integrated under one system controller. For production, this means centralized control and optional CIM integration. For QRA applications, multiple chamber types can be integrated for specific tasks. For example, small chambers for different thermal zones. This includes cold chambers, cycling chambers, etc.
Future enhancements to the system include (but are not limited to) ASCII output for smart loader/unloaders and soft error testing.
Because this system has sufficient address and clocks for SRAMs, DRAMs, VRAMs, EEPROMs, and SIMMs, the system is ideal for component characterization by component engineers for large OEMs that have an independent component verification engineering group. This is especially true since other system configurations can be integrated under the same controller (such as high pin count logic testers).